The present invention relates to an arrangement to indicate, within an incoming pulse train, only signal pulses having a duration exceeding a limit value, and which includes logical circuits for generating a control pulse train by means of the incoming pulse train and for processing the logical values in said control pulse train and incoming pulse train.
Data processing systems and telecommunication systems such as those that are stored program controlled process signals consisting of pulse trains. Before a pulse processing arrangement receives a pulse train the pulses are usually regenerated, for example, by means of a trigger. The generation produces mainly rectangular pulses in the train, i.e. pulses having the same polarity, sharp leading and trailing edges, and amplitudes that are as uniform as possible, respectively. The regenerated pulse train represents the one and zero states for the pulse processing logical circuits which are expected to respond to the sharp edges of the pulses as fast as possible and, for example when generating intermediate or control signals, to produce pulses with equally sharp edges. It is, however, necessary to be aware of that the pulse edges are in fact not rectangular and that it is in fact impossible to neglect the reaction times. Theoretically the output of an AND-gate, for example, should never be activated when its two inputs, of which one is inverting, receive identical pulse trains. In practice, due to the inverting, different steepnesses and different reaction times are present at the inputs so that the AND-gate generates disturbing pulses. The more sensitive the logic circuits used, the greater the risk that they themselves generate disturbing pulses which are processed by equally sensitive responsive circuits as real signal pulses, although such disturbing pulses only have durations corresponding to the reaction times of the circuits. The consequence will be an erroneous processing result. For instance when counting pulses the leading edges of all incoming pulse are counted irrespective of whether they belong to the signals or the disturbing pulses.
As examples of known arrangements, the purpose of which is to extinguish disturbing pulses being transmitted together with signal pulses, solutions are shown in to the German patent applications Nos. 1,246,025, 1,462,800, 2,165,461 and 2,327,671. It is easy to realize that such goal is most difficult to achieve if it is furthermore demanded that the signal pulses are neither to shortened nor delayed. Such additional demands lead to complicated arrangements with a feed-back circuit system, often having a capacitor charging circuit in the feed-back path or forcing a periodic feeding of the signals controlled by means of a special pulse generator. It should be mentioned in advance that the proposed arrangement according to the invention generates indication signals, each of which indicating an incoming signal pulse, i.e. that signal delays and shortenings are permitted. Furthermore it is obvious that the suppression of the disturbing pulses is easier if such pulses only appear immediately before or after a signal pulse as is the case, for example, when bounce pulses appear in connection with the working or releasing of a relay spring contact. The bounce pulses and the pauses between the pulses then appear in a characteristic way which is based on the spring properties. However, a sensitive logical circuit also processes disturbing pulses, which occur between the signal pulses, for example due to inductive crosstalk from adjacent cables, causing arbitrary pulse and pause lengths.